Part A
AD9777BSVZ
아날로그 디바이스(주)
- Lifecycle
- Active
- Stock
- 2987 PCS
- Package
- TQFP-80
- Series
- 데이터 수집 - 다이 모드 변환기(DAC)
Replacement verdict
Compatible functional replacement candidate
The AD9777BSVZ and AD9773BSVZRL are both dual-channel 12-bit high-speed DACs from the same Analog Devices TxDAC+ family, sharing the 80-lead TQFP-EP package and 3.3 V core supply. The AD9777BSVZ offers a higher maximum update rate and wider input data rate, making it the more capable device, while the AD9773BSVZRL provides a lower-cost alternative with reduced speed headroom. Both are functionally interchangeable for many applications, but the AD9773BSVZRL should be validated against the system's required sample rate and interpolation settings before substitution.
Resolution and Channel Count
High match
Package Type
High match
Maximum Update Rate
Validation required
Supply Voltage
Validation required
Parts at a glance
Part B
AD9773BSVZRL
아날로그 디바이스(주)
- Lifecycle
- Active
- Stock
- 85 PCS
- Package
- TQFP-80
- Series
- 데이터 수집 - 다이 모드 변환기(DAC)
Key differences
Rows are prioritized by design impact. Highlighted values require attention during substitution.
Key electrical and mechanical differences between the two devices
| Parameter | AD9777BSVZ | AD9773BSVZRL | Why it matters |
|---|---|---|---|
| Resolution (DAC bits) | 16 bit | 12 bit | Resolution determines the quantization accuracy and achievable SNR of the DAC; a 16-bit part offers significantly finer amplitude granularity than a 12-bit part, so they are not functionally interchangeable in precision applications. |
| Number of DAC Channels | 2 (dual) | 2 (dual) | Both are dual-channel DACs, so the channel count matches; this is a baseline requirement for I/Q or dual-path transmit architectures. |
| Maximum Update Rate | 160 MSPS | 160 MSPS | The maximum DAC update rate sets the achievable output bandwidth and oversampling margin; identical rates mean similar spectral performance envelopes. |
| On-chip Interpolation | 2x/4x/8x selectable | 2x/4x/8x selectable | Interpolation filters relax the input data rate and simplify analog reconstruction filtering; matching options preserve system-level compatibility. |
| Digital Interface | Dual-port LVDS/CMOS input | Dual-port LVDS/CMOS input | The input interface type determines how the DAC connects to the digital source (FPGA/DSP); identical interfaces allow reuse of the same digital backend design. |
| Supply Voltage | 3.3 V analog and digital | 3.3 V analog and digital | Supply voltage compatibility affects power rail design and level shifting; matching rails simplify board-level substitution. |
| Package | 80-lead TQFP (SV) | 80-lead TQFP (SV) | Package and pinout compatibility is essential for drop-in replacement on an existing PCB; identical packages allow the same footprint. |
| SFDR (at rated conditions) | Higher (16-bit grade) | Lower (12-bit grade) | Spurious-free dynamic range affects signal purity in communication systems; the higher-resolution device typically delivers better SFDR, so performance-critical designs cannot freely substitute. |
Need help validating a replacement?
Send your BOM and application constraints for technical and sourcing review.
Full specification comparison
Use manufacturer datasheets as the final authority.
| Specification | AD9777BSVZ | AD9773BSVZRL |
|---|---|---|
| Supplier | - | Analog Devices Inc.,Rochester Electronics, LLC |
| Series | TxDAC+® | TxDAC+® |
| Part Status | Active | Active |
| Number of Bits | 16 | 12 |
| Number of D/A Converters | 2 | 2 |
| Settling Time | 11µs (Typ) | 11ns (Typ) |
| Output Type | Current - Unbuffered | Current - Unbuffered |
| Differential Output | Yes | Yes |
| Data Interface | Parallel | Parallel |
| Reference Type | External, Internal | External, Internal |
| Voltage - Supply, Analog | 3.1V ~ 3.5V | 3.1V ~ 3.5V |
| Voltage - Supply, Digital | 3.1V ~ 3.5V | 3.1V ~ 3.5V |
| INL / DNL(LSB) | ±6, ±3 | ±0.4, ±0.2 |
| Architecture | Oversampling Interpolating DAC | Current Source |
| Operating Temperature | -40°C ~ 85°C | -40°C ~ 85°C |
Frequently asked questions
What are the key differences between the AD9777BSVZ and the AD9773BSVZRL?
Both are dual-channel, 16-bit, high-speed DACs from Analog Devices in a 100-lead TQFP_EP package. The AD9777BSVZ is specified for a maximum update rate of 400 MSPS, while the AD9773BSVZRL is specified for 160 MSPS. The AD9777BSVZ is supplied in tray packaging, whereas the AD9773BSVZRL is supplied in tape-and-reel packaging (the "RL" suffix). Both integrate a 2x/4x/8x interpolating filter and a digital quadrature modulator.
Are the AD9777BSVZ and AD9773BSVZRL pin-compatible?
Yes. Both devices are offered in the same 100-lead TQFP_EP (SV) package with the same pinout, so they are pin-compatible. However, the AD9777BSVZ supports a higher maximum update rate (400 MSPS vs. 160 MSPS), so the design must be validated against the lower-speed device if it is used as a substitute.
What is the resolution and channel count of these DACs?
Both the AD9777BSVZ and AD9773BSVZRL are dual-channel (two DACs per package), 16-bit resolution digital-to-analog converters with on-chip interpolation filters and digital quadrature modulation capability.
What maximum update rate does each device support?
The AD9777BSVZ is specified for a maximum DAC update rate of 400 MSPS. The AD9773BSVZRL is specified for a maximum DAC update rate of 160 MSPS. The system clock and input data rate must be designed around the lower limit when the AD9773BSVZRL is used.
What interpolation and modulation features do these DACs provide?
Both devices integrate programmable 2x, 4x, or 8x interpolating filters and a digital quadrature modulator (with a numerically controlled oscillator) that allows upconversion of baseband I/Q data to an intermediate frequency. These features are common to both the AD9777BSVZ and AD9773BSVZRL.
What is the difference between the "BSVZ" and "BSVZRL" suffixes?
The "BSVZ" suffix denotes the 100-lead TQFP_EP package in a RoHS-compliant (Z) version. The "RL" suffix on the AD9773BSVZRL indicates tape-and-reel packaging for automated assembly, whereas the AD9777BSVZ is supplied in trays. The silicon die and package are otherwise the same family.
Can the AD9773BSVZRL be used as a drop-in replacement for the AD9777BSVZ?
Because both share the same package and pinout, the AD9773BSVZRL can be placed on the same footprint. However, it is limited to 160 MSPS versus 400 MSPS for the AD9777BSVZ, so it is only a valid substitute if the application's update rate, clocking, and filter configuration remain within the AD9773BSVZRL's specified limits. The design must be re-validated against the Analog Devices datasheet for the AD9773.
What supply and interface requirements should be verified before comparing these parts?
Both devices operate from a 3.3 V analog and digital supply with a separate 1.8 V (or 3.3 V) digital I/O supply and use a parallel CMOS input interface. Before substituting one for the other, verify the supply rails, clock input levels, and input data timing against the respective Analog Devices datasheets, since the maximum clock rate differs between the AD9777BSVZ (400 MSPS) and the AD9773BSVZRL (160 MSPS).