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74LVC1G125SE-7
+BOMIC BUFF NON-INVERT 5.5V SOT-353
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제조업체다이오즈(주)
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제조업체 부품 #74LVC1G125SE-7
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재고23807
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사양
| 속성 | 가치 |
| Series | 74LVC |
| Part Status | Active |
| Base Product Number | 74LVC1G125 |
| Logic Type | Buffer, Non-Inverting |
| Number of Elements | 1 |
| Number of Bits per Element | 1 |
| Output Type | 3-State |
| Current - Output High, Low | 32mA, 32mA |
| Voltage - Supply | 1.65V ~ 5.5V |
| Operating Temperature | -40°C ~ 125°C (TA) |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Supplier Device Package | SOT-353 |
| Packaging | Cut Tape (CT), Tape & Reel (TR) |
개요
Description
Equivalent
- TI SN74LVC1G125
- ON Semiconductor MC74LVC1G125
- Nexperia (formerly NXP) 74LVC1G125
- STMicroelectronics ST74LVC1G125
Note: check exact package, temperature range, and suffix (-7) to ensure full compatibility.
Features
- 1-bit, non-inverting buffer with 3-state output
- Output enable (OE) input to control tri-state output
- LVC (low-voltage CMOS) family
- Vcc range: 1.65 V to 3.6 V
- CMOS/TTL-compatible input thresholds
- High drive capability and fast propagation
- Low static and dynamic power consumption
- ESD protection and robust overvoltage tolerance
- Wide operating temperature (typical -40°C to 125°C)
- Pb-free, RoHS-compliant package (SE variant)
Note: OE logic level is defined in the datasheet (enable/disable with OE).
Pinout
- Function: Single-channel non-inverting buffer with a tri-state output. A is the data input, Y is the buffered output, OE enables/disables the output; Vcc and GND supply.
Manufacturer
- What kind of company: A global semiconductor company specializing in discrete components, logic ICs, and MOSFETs. It is headquartered in the Netherlands and originated as a spin-off from NXP Semiconductors, now operating as an independent supplier of electronic components.
Application
- Level shifting/bridging between voltage domains (1.65–3.6 V devices).
- Buffering and driving signals to reduce source loading and increase fan-out.
- Tri-state bus buffering for shared data/address lines or I/O expansion (OE\ controls isolation).
- Interface between microcontrollers/FPGA and peripherals (RAM, LCDs, sensors) requiring selective enable.
- Power-down isolation to prevent back-powering or leakage when devices are off.